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Author:

Cao, Rui (Cao, Rui.) | Zhang, Yan (Zhang, Yan.) | Liu, Xue (Liu, Xue.) | Li, Yang (Li, Yang.) | Lv, Chunlin (Lv, Chunlin.) | Liu, Jinjun (Liu, Jinjun.)

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SCIE EI Scopus Web of Science

Abstract:

Power routing (PR) provides a good choice to improve the modular converter reliability by equalizing the lifetime among multi-cells. The existing PR strategies just equalize the lifetime of power semiconductor devices by routing lighter loads for aged cells. However, the neglect of capacitor may mislead the multi-cell lifetime convergence. Besides, the light load allocation of the aging cell does not always mean the lifetime extension considering topologies and operation principles. Hence, this article proposed a capacitor lifetime-based PR for input-series-output-parallel connected dual active bridge converter. The proposed strategy can achieve the same accuracy as existing PR strategies, greatly reducing computation time and the complexity of the hardware circuit. Moreover, the nonmonotonic relationship between the damage growth rate and load of each cell is revealed and a damage growth rate constraint is developed to ensure the PR feasibility. Simulation is performed to verify the validity of the proposed strategy and constraints. Finally, a scaled down prototype has been developed to verify the PR feasibility and obtain the nonmonotonic relationship, verifying the necessity of proposed constraints. In addition, the effect of PR on the thermal stress and cumulative damage of capacitors is verified by a temperature test.

Keyword:

Aging Capacitors Constraint input-series-output-parallel connected dual active bridge (ISOP-DAB) converters Insulated gate bipolar transistors Load modeling metallized film capacitor (MFC) power routing (PR) reliability Reliability Routing Stress

Author Community:

  • [ 1 ] [Cao, Rui]Xi An Jiao Tong Univ, Sch Elect Engn, Xian 710000, Peoples R China
  • [ 2 ] [Zhang, Yan]Xi An Jiao Tong Univ, Sch Elect Engn, Xian 710000, Peoples R China
  • [ 3 ] [Liu, Xue]Xi An Jiao Tong Univ, Sch Elect Engn, Xian 710000, Peoples R China
  • [ 4 ] [Li, Yang]Xi An Jiao Tong Univ, Sch Elect Engn, Xian 710000, Peoples R China
  • [ 5 ] [Lv, Chunlin]Xi An Jiao Tong Univ, Sch Elect Engn, Xian 710000, Peoples R China
  • [ 6 ] [Liu, Jinjun]Xi An Jiao Tong Univ, Sch Elect Engn, Xian 710000, Peoples R China

Reprint Author's Address:

  • [Zhang, Y.]Xi'an Jiaotong University, China;;[Zhang, Y.]Xi'an Jiaotong University, China;;

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Source :

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

ISSN: 0278-0046

Year: 2022

Issue: 11

Volume: 69

Page: 11283-11292

8 . 2 3 6

JCR@2020

ESI Discipline: ENGINEERING;

ESI HC Threshold:7

Cited Count:

WoS CC Cited Count: 0

SCOPUS Cited Count: 6

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 4

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